1. Field of the Invention
The present invention relates to a structure of a pixel that implements an image sensor, which has low noise and small dark current and high sensitivity, and more particularly pertains to an image sensor manufactured by adding several steps to a CMOS integrated circuit fabrication procedure.
2. Background-Art
CMOS image sensors are manufactured by adding several steps for achieving a structure of photoelectric conversion to fabrication procedure of CMOS integrated circuits. There are a passive pixel architecture that directly transfers charges generated by light to a circuit provided outside a pixel array and an active pixel architecture that transfers a voltage change associated with the storage of signal charges through a transistor provided inside a pixel to a circuit outside a pixel array. The active pixel architecture can achieve lower noise and higher sensitivity performances. In the active pixel architecture, there are a first approach that reads out a potential change in a photodiode associated with the storage of charges directly through a transistor, and a second approach, in which charges are transferred firstly to a floating diffusion inside a pixel from a photodiode and a potential change in the floating diffusion is read out through a transistor.
The example of the second approach is disclosed in a following document:    1) Teh-Hsuang Lee et al., “Active Pixel Sensor Integrated with a Pinned Photodiode” Japanese Laid Open Patent Application (JP-1996-335688A)
An example of the pixel structure and circuit pertaining to the second approach is shown in FIG. 1.
A p-type semiconductor silicon is used as a substrate (1), an n-type region as a charge storage region (2) is formed in a portion serving as a photodiode, and on the surface thereof, a p-layer (3) of high concentration, or a p-type region having the same polarity as the substrate, is further formed. Consequently, a portion where electrons are stored is buried inside the semiconductor, and the surface is filled with carriers of the opposite polarity (holes in the case that the electrons are stored), and the dark current is consequently made very small.
Also, because the charge storage region (2) is connected to a transferring transistor, if the potential of a control signal TX of its gate electrode (6′) is made high so that a gate is opened, the charges stored in an n-type floating diffusion (FD) (15) are perfectly transferred. This methodology removes an afterimage caused by residual charges and resolves the generation of noises, and together with the combination of the charge transfer and the read out operation to a peripheral circuit, a correlative double sampling process is executed thereby canceling a reset noise.
For achieving read out operation of the potential, a gate of a buffer transistor (7) is connected to the floating diffusion (15), and a high voltage is applied to the line S so that a pixel select transistor (8) can conduct. Furthermore, a buffer transistor (7) and a current supply transistor (9) provided around the pixel array implements a source follower circuit, and the potential of the floating diffusion is read out by the source follower circuit and is transferred to an output.
Reference numeral 4 of FIG. 1 indicates an insulator (dielectric) formed of silicon oxide film, reference numeral 5 indicates a resetting n+ region, and reference numeral 6 indicates a reset gate electrode.
Such pixel configuration is widely used, because the CMOS image sensor having the low dark current, random noise and high sensitivity can be achieved. However, in such charge transfer methodology, the portions where the charges are stored are required to be allocated at two portions, or at the photodiode unit and the floating diffusion. Thus, in association with the miniaturization of a pixel size, the treatable signal charge amount is reduced, and it becomes difficult to make the signal amplitude in the floating diffusion high. Hence, it is feared that a dynamic range is decreased in association with a drop in a supply voltage.
On the other hand, the first approach is the methodology that does not carry out the charge transfer, and this is superior to the charge transferring method with regard to the treatable charge amount. However, in the first approach, the reset noise becomes the main factor of the random noise, and the noise level becomes great, and the photodiode cannot be formed with the buried structure, and the dark current becomes also great. As a structure to decrease this dark current, a methodology that partially forms a p-type semiconductor on a surface is disclosed in a following document:    2) Teh-Hsuang Lee et al., “Partially Pinned Photodiode for Solid State Image Sensors”, Japanese Laid Open Patent Application (JP 1998-209422A).
FIG. 2 shows an example of this structure. In the structure as shown in FIG. 2, since the potential of an n-type region serving as the charge storage region (2) of the photodiode is connected to a gate of a MOS-type buffer transistor (7), a part of the n-layer of the photodiode is brought into contact with the interface between the semiconductor and a silicon oxide film (4), and the dark current becomes great as compared with the case that the charge storage region (2) is perfectly buried.